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TMS320C5515
SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
Table 5-59. JTAG ID Register Selection Bit Descriptions
www.ti.com
BIT
31:28
27:12
11:1
0
NAME
VARIANT
PART NUMBER
MANUFACTURER
LSB
DESCRIPTION
Variant (4-Bit) value: 0001.
Part Number (16-Bit) value: 1011 1000 1111 1110.
Manufacturer (11-Bit) value: 0000 0010 111.
LSB. This bit is read as a "1".
5.21.2 JTAG Test_port Electrical Data/Timing
Table 5-60. Timing Requirements for JTAG Test Port (see Figure 5-46 )
CV DD = 1.05 V
NO.
CV DD = 1.3 V
MIN
MAX
UNIT
2
3
4
5
6
7
8
t c(TCK)
t w(TCKH)
t w(TCKL)
t su(TDIV-TCKH)
t su(TMSV-TCKH)
t h(TCKH-TDIV)
t h(TCKH-TDIV)
Cycle time, TCK
Pulse duration, TCK high
Pulse duration, TCK low
Setup time, TDI valid before TCK high
Setup time, TMS valid before TCK high
Hold time, TDI valid after TCK high
Hold time, TMS valid after TCK high
60
24
24
10
6
5
4
ns
ns
ns
ns
ns
ns
ns
Table 5-61. Switching Characteristics Over Recommended Operating Conditions for JTAG Test Port
(see Figure 5-46 )
CV DD = 1.05 V
NO.
PARAMETER
CV DD = 1.3 V
MIN
MAX
UNIT
1
t d(TCKL-TDOV)
Delay time, TCK low to TDO valid
30.5
ns
2
TCK
3
1
4
1
TDO
7
5
TDI
8
6
TMS
Figure 5-46. JTAG Test-Port Timing
152
Peripheral Information and Electrical Specifications
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